| Introduction: |
| The Motorola Data Manual states that the 68000 microprocessor has 5 basic addressing modes: |
| Register Direct | |
| Register Indirect | |
| Absolute Addressing | |
| Program Counter Relative | |
| Immediate |
| I believe a few more could be added, but more on this later. The above addressing modes can each be broken down to two or more specific modes: |
| Register Direct |
| Data Register Direct | |
| Address Register Direct |
| Register Indirect |
| Address Register Indirect | |
| Address Register Indirect with Postincrement | |
| Address Register Indirect with Predecrement | |
| Address Register Indirect with displacement | |
| Address Register Indirect with Index and displacement |
| Absolute Addressing |
| Absolute Short Addressing | |
| Absolute Long Addressing |
| Program Counter Relative |
| Program Counter Relative with displacement | |
| Program Counter Relative with Index and displacement |
| Immediate |
| Immediate | |
| Quick Immediate |
| The two I believe could be added are: |
| Implied (or Inherent Mode) | |
| Relative (Branch Instructions) |
| Basic Instruction Syntax: |
| Almost all 68000 instructions use the following syntax: |
| Instruction.<size> Source Effective Address, Destination Effective Address |
| Some examples are: |
| MOVE.B D0,$203A | |
| ADD.W D2,D5 | |
| SUBI.L #$00100000,D5 | |
| MOVE.L A0,A6 |
| Register Direct Mode: |
| Register direct mode refers to instructions in which both the source and destination effective addresses are either Data or Address Registers. |
| Data Register Direct mode is a more specific form of Register Direct. In Data Register Direct mode both the source and destination effective addresses are Data Registers. Likewise, Address Register Direct mode is a more specific form of Register Direct. In Address Register Direct mode both the source and destination effective addresses are Address Registers. |
| The following is list of animations that should show more clearly how these modes function: |
| Data Register Direct | Address Register Direct | |
| Byte Size Data | ||
| Word Size Data | Word Size Data | |
| Longword Size Data | Longword Size Data |
| Register Indirect Mode: |
| Register Indirect mode refers to instructions in which one of the effective addresses (Source or Destination) is an address register surrounded by parentheses. This indicates that the source or destination effective is specified by the contents of the address register. For example, if Address Register A0 has the value $00004000 in it and the 68000 executes the following instruction: |
| MOVE.B (A0),D0 |
| Then the data at memory address $00004000 is copied to the lower byte of D0. There are five different types of Address Register Indirect Mode. They are listed below: |
| Address Register Indirect | |
| Address Register Indirect with Postincrement | |
| Address Register Indirect with Predecrement | |
| Address Register Indirect with displacement | |
| Address Register Indirect with Index and displacement |
| Address Register Indirect (ARI) uses an Address Register to hold the address of the data being either written to or read from memory. This mode is identified by parentheses surrounding the Address Register. |
| Animation: | Address Register Indirect |
| Address Register Indirect (ARI) with postincrement uses an Address Register to hold the address of the data being either written to or read from memory, but after the instruction is complete, the address register's value is incremented by either 1, 2, or 4. The amount by which the address register is incremented is based on the data size (i.e.; 1 for Byte, 2 for Word, 4 for Longword).This mode is identified by parentheses surrounding the Address Register followed by a plus sign. |
| Animation: | Address Register Indirect with Postincrement |
| Address Register Indirect (ARI) with predecrement, as with the other ARI modes, uses an Address Register to hold the address of the data being either written to or read from memory. The difference in this mode is the address register is decremented before memory is referenced. The amount by which the address register is decremented is based on the data size (i.e.; 1 for Byte, 2 for Word, 4 for Longword). This mode is identified by parentheses surrounding the Address Register preceded by a minus sign. |
| Animation: | Address Register Indirect with predecrement |
| Address Register Indirect (ARI) with displacement mode specifies a 16 bit displacement that is added to the value in the address register before memory is referenced to calculate either the destination or source effective address. This mode does NOT change the contents of the address register being used. The 16 bit displacement is a 2's compliment number, meaning that the displacement can be positive or negative ($0000-$7FFF is positive, $8000-$FFFF is negative). In this mode the Address Register is surrounded by parentheses and is preceded by a 16 bit displacement. |
| Animation: | Address Register Indirect with displacement (Negative) | |
| Animation: | Address Register Indirect with displacement (Positive) |
| Address Register Indirect (ARI) with index uses an index register (any one of the 8 address registers or any one of the 8 data registers) to specify a value to be added to the value in the address register (the base register being used for this mode) to calculate either the destination or source effective address. This mode does NOT change the contents of the address register being used. You may also specify an 8 bit displacement. In this mode the Address Register and the Index Register are surrounded by parentheses and possibly preceded by an 8 bit displacement. |
| Animation: | Address Register Indirect with index |
Absolute Addressing
| In Absolute Addressing mode, either (or both) the source or destination effective address is specified by using a 6 digit (Absolute Long)or 4 digit (Absolute Short) address. Care must be used in Absolute Short Addressing because the MSb of the specified address is copied to the higher address bits before the address is placed on the address bus. For example: you want to move some data from D2 to memory address $008000. In this case you must specify the complete address (use Absolute Long). If you use Absolute Short Addressing: |
| MOVE.W D0,$8000 |
| the MSb of $8000 (a '1' shown below in red) will be copied to A16-A23 (shown in blue) and then placed on the address bus. So, the instruction would really move data to memory address $FF8000 (1111 1111 1000 0000 0000 0000) instead of $008000. (See Animation) |
| A number of animations are listed below to show not only the Absolute Short and Long Addressing Modes, but also byte, word and longword transfers |
| Program Counter Relative: |
| Program Counter Relative mode is very similar to Address Register Indirect mode. There are two differences: |
| 1. The Program Counter is the base address register, not an Address Register | |
| 2. There is no Predecrement or Postincrement mode with PC Relative |
| The two animations listed below should demonstrate how this mode works: |
| Program Counter Relative with displacement | |
| Program Counter Relative with Index and displacement |
| Immediate Mode: |
| Immediate mode is used when the data is known, or is a constant, in the program. An example would be: setting a base address for referencing a memory location. In this example, the program would like to set the address in an Address Register |
| MOVE.L | #$005000,A2 | ;set base address to $005000 |
| The three animations listed below should demonstrate how this mode works: |
| Immediate Mode (Byte Size Data) | |
| Immediate Mode (Word Size Data) | |
| Immediate Mode (Longword Size Data) |
| Quick Immediate Mode is identified by certain instructions that are followed by a "Q" as in: |
| MOVEQ | #$2F,D2 | ;moves 0000002F to Data Register D2 |
| Although Motorola refers to this as an Addressing Mode, it may be more helpful to think of this mode in terms of: There are special instructions that allow quick data. As shown in the above example, the MOVE instruction will only allow 8 bits of data (a Byte), but the result affects the complete register. The ADDQ instruction will allow BYTE, WORD or LONGWORD, but you can only specify a number between 1 and 8. Because each instruction behaves a little differently, this "mode" will be better explained by looking at each instruction, in the "Instruction Set" Section of this course. |
| Implied (Inherent) Mode: |
| First, remember that this is not an official addressing mode for the 68000. There are a few instructions that may fit into this unofficial mode. With other microprocessors, an Implied Mode refers to instructions that IMPLY the data as in: |
| CLR.L | D5 | ;put 00000000 in D5 |
| I may be splitting hairs but, no data is explicitly specified - it is implied by the instruction. Also, this instruction, as well as a few others, does not fit into any of the other addressing modes. |
| Relative Mode: |
| First, remember that this is not an official addressing mode for the 68000. There is no official addressing mode set aside for the BRANCH instructions. In other processors, this mode was always called Program Counter Relative Mode. The problem with respect to the 68000 is that the term "Program Counter Relative Mode" refers to something completely different that BRANCH instructions. Branch instructions will be inspected in detail in the "Instruction Set" Section of this course. |
Send comments to: sjkuyath@uncc.edu
Copyright Stephen J Kuyath, UNCC
last modified: January 3, 2007