CASPER -- Chip Multi-Threading (CMT) Architecture Simulator for
Performance, Energy and aRea Analysis (SPARC V9 ISA)
Casper is a parameterized CMT many-core cycle-accurate processor simulator. It
models area specifications from the OpenSPARC T1 microprocessor. To measure
power dissipation and current consumption, CASPER uses the ASI
(Active-Static-Idle) Power model. This project primarily started with a
collaboration with Sun Microsystem Inc. based on the OpenSPARC T1 project.
Casper is released under GPL License Agreement. You can redistribute it
and/or modify it under the terms of the GNU General Public License version 2 as
published by the Free Software Foundation and as long as you keep intact
the copyright header on top of each code file. Casper uses some portions
of code from OpenSPARC T1, released in version 1.5. OpenSPARC T1 is also
distributed under GPL. Please consult www.opensparc.net for further license information.
Here' a presentation about Casper in Validation Summit 2008 in Sun Microsystems, Inc.
(Santa Clara campus)
Here's a link to an older version of Casper White Paper. We are working to provide a detailed
user manual of Casper explainging all functionalities in detail.
For questions and download instructions please email to Kushal Datta
(kdatta@uncc.edu)
Download
(Download will be effective from 11/25/2008)