neoCad Project
The longest delay in IC production today, which causes also increasing costs, is testing of the device. This project focuses on circuits that test themselves, using methods known as BIST (Built-in Self Test) and iDDT & DFT (Design for Testability). The UNCC analog design group intents to use the MOS Design Tool to design the analog and mixed-signal components to aid in the development of mixed-signal BIST microsystems. This research is sponsored by DARPA and collaborators include UNCC electrical and computer engineering professors; Dr. David M. Binkley, Dr. Charles E. Stroud, Dr. Rafic Z. Makki, and Dr. Tom P. Weldon, and many graduate students.


Benchmark Test Circuit (Rail-to-Rail Amplifier)

MOS Design Tool

Historically analog and mixed-signal circuits have been slower to design than their digital counter parts due to the large amount of parameter interaction. The UNCC analog design group is working on methods and programs that speed up this process by allowing the designer to focus on one transistor at a time and concentrate only on the desired parameter.

Click here to get to the MOS Design Tool site

The MOS Design Tool was developed to give the designer a graphical view of the effects that the design change has on a transistor. This research is sponsored by DARPA and collaborators include UNCC electrical and computer engineering professor; Dr. David Binkley, and UNCC graduate research assistants Steve Tucker and Clark Hopper. Previous work was performed by recent graduate student; Brian Moss. This project is a smaller part of the NEO-CAD project.

Design Optimization using Inversion Coefficient

Project Integration