PUBLICATIONS

Journals

  1. S. Datta, B. Joshi, A. Mukherjee, and A. Ravindran, “Efficient Testing and Diagnosis of Digital Microfluidic Biochips,” Accepted for publication in the ACM Journal on Emerging Technologies in Computing System.
  2. R. Karanam, A. Ravindran, and A. Mukherjee, “A Stream Chip-multiprocessor for Bioinformatics”, ACM SIGARCH Computer Architecture News, Volume 36, Issue 2, pp. 2 – 9, May 2008
  3. S. Tucker, A. Ravindran, C. Wichman, and A. Mukherjee, "Design Techniques for Micro-Power Algorithmic Analog-to-Digital Converters", Journal of Low Power Electronics, Vol. 3., pp. 1 - 10, April 2007.
  4. D. Davids, S. Datta, A. Mukherjee, B. Joshi and A. Ravindran, "Multiple Fault Diagnosis in Digital Microfluidic Biochips", ACM Journal on Emerging Technologies in Computing Systems, vol. 2, no. 4,  pp.1–15, October 2006.
  5. S. Mohan, A. Ravindran, D. Binkley and A. Mukherjee, "Power Optimized Design of CMOS Programmable Gain Amplifiers”, Journal of Low Power Electronics, Vol. 2, No:2, pp. 259-270, August 2006.
  6. K. Datta, A. Mukherjee and A. Ravindran, "Automated Design Flow for Diode based Nanofabrics", ACM Journal of Emerging Technologies in Computing Systems, vol, 2, no.3, pp. 219-241, July 2006.
  7. R. Karanam, A. Ravindran, A. Mukherjee, C. Gibas, and A. Wilkison, “Using FPGA-based Hybrid Computers for Bioinformatics Applications”, XCell Journal, Issue 58, Third Quarter, 2006
  8. K. Regester, J. Byun, A. Mukherjee and A. Ravindran, “Implementing Bioinformatics Algorithms on Nallatech-configurable Multi-FPGA Systems”, Xcell Journal., pp. 100-103 Second Quarter, 2005.
  9. A. Ravindran, E. Vidal, S. Yoo, K. Ramarao and M. Ismail, ”A Differential Current Mode Variable Gain Amplifier with a Digital dB-linear Gain Control”,  Journal of Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers, Vol. 38, Issue 2-3, pp. 161-174, February 2004.*
  10. H. Elwan, A. Ravindran and M. Ismail, “A CMOS Low Power Baseband Chain for a GSM/DECT Multi-standard Receiver”, IEE Proceedings: Circuits, Devices, and Systems, Vol. 149, Issue 5, pp. 337-347, Oct. 2002.*
  11. A. Ravindran, K. Ramarao, E. Vidal and M. Ismail, “Compact Low-voltage Four Quadrant CMOS Current Multiplier”, Electronic Letters, Volume: 37 Issue: 24, 22 Nov. 2001, pp. 1427-1428.*

  Conferences

  1. A. Ravindran, and D. Burns, “A multi-threaded DNA Tag/Anti-tag Library Generator for Multicore platforms”, Accepted, IEEE Symposium on Computational Intelligence in Bioinformatics and Computational Biology, March, 2009.  
  2. A. Ravindran, A. Mukherjee, and P. Tolley, “An Undergraduate Computer Engineering Educational Framework for using Field Programmable Gate Arrays as Efficient Hardware Accelerators”, Conference of Course, Curriculum and Laboratory Improvement Program, Aug 14-15, 2008.
  3. Daniel Davids, Bharat Joshi, Arindam Mukherjee, and Arun Ravindran, “A Fault Detection and Diagnosis Technique for Digital Microfluidic Biochips,” IEEE International Mixed-Signals, Sensors, and Systems Test Workshop, June 18-20, 2008.
  4. R. Karanam, A. Ravindran and A. Mukherjee, “A Stream Chip Multiprocessor for Bioinformatics”, Workshop on Design, Analysis and Simulation of Chip Multiprocessors, December, 2007.
  5. Bharat Joshi, Arindam Mukherjee, and Arun Ravindran, “Highly Dependable SCADA Systems,” National Workshop on Beyond SCADA: Networked Embedded Control for Critical Physical Systems, November 2006.
  6. J. Byun, R. Karanam, A. Ravindran, A. Mukherjee and B. Joshi, "Fault Tolerant Techniques for I/O Bound High Performance Systolic Arrays on SRAM FPGAs", MAPLD, September 2006.
  7. K. Datta, J. Bolano, O. Eruotor, Y. Nerie, A. Mukherjee, A. Ravindran, “The Wireless Sensor Tissue: A Network of Wireless Sensor Nodes using Cellular Mechanisms for Autonomous Distributed Fault Tolerance”, North Atlantic Test Workshop May 10-12, 2006.
  8. Kushal Datta, Ravi Kiran Karanam, Jong-Ho Byun, Arindam Mukherjee, Bharat Joshi, and Arun Ravindran, “A Biology-inspired Distributed Fault Tolerant Design Methodology for Highly Available Systems with Efficient Redundancy Insertion Technique,” North Atlantic Test Workshop, May 10-12, 2006.
  9. A. Ravindran and S. Mohan, “A Low Input Impedance Fully Differential CMOS Transresistance Amplifier using Cascode Regulation”, IEEE CICC, September 2005.
  10. C. Wichman, S. Tucker and A. Ravindran, “A Micropower OTA for Digitally Calibrated Algorithmic ADCs”, 48th IEEE MWSCAS, August 2005.
  11. J. Bolano, J. Johnson, A. Wood, A. Mukherjee, H. Hilger and A. Ravindran, “Real Time Wireless Remote monitoring of Methane Flux in Landfills”, INCEED, July 2005. 
  12. A. Yamazaki, A. Ravindran, O. Akgun and M. Ismail, "An Active-RC Reconfigurable Lowpass-polyphase Tow-Thomas Biquad Filter", 47th IEEE MWSCAS, July 2004.
  13. A. Savla, A. Ravindran and J. Leonard, “A Novel Queuing Architecture for Background Calibration in Pipelined ADCs”, IEEE ISCAS, May 2004.
  14. A. Ravindran, A. Savla and J. Leonard, “Digital Error Correction and Calibration of Non-linearities in a Pipelined ADC”, IEEE ISCAS, May 2004
  15. Y. Yoo, A. Ravindran and M. Ismail, "A Low Voltage CMOS Transresistance-based Variable Gain Amplifier", IEEE ISCAS, May 2004.*
  16. A. Savla, A. Ravindran and M. Ismail, "A Reconfigurable Low-IF/Zero-IF Receiver Architecture for Multi-Standard Wide Area Wireless Networks", IEEE ICECS 2003, pp. 934-937, December 2003.*
  17. A. Savla, A. Ravindran, J. Leonard and M. Ismail, “System Analysis of a Multi-standard Wireless Direct Conversion Receiver”, 45th IEEE MWSCAS Conference, August 2002.*
  18. A. Ravindran, A. Savla, I. Younus and M. Ismail, “A 0.8V CMOS Filter based on a Novel Low Voltage Operational Trans-resistance Amplifier”, 45th  IEEE MWSCAS, August 2002.*
  19. A. Savla, A. Ravindran and M. Ismail, “A Reconfigurable Low Power Pipeline ADC for Multi-standard Wireless Applications”, IEE-Japan, Analog VLSI Workshop, September 2002.*
  20. A. Ravindran, E. Vidal and M. Ismail, “A Digitally Generated Exponential Function for dB-linear CMOS Variable Gain Amplifiers”, 14th International Conference on Digital Signal Processing, July 2002.*

Book Chapter

1. B. Joshi, A. Mukherjee, and A. Ravindran, “Architectural Optimizations under Fault Conditions for Emerging Digital Microfluidic Biochips”, Book chapter, VLSI Circuits for Biomedical Applications, Kris Iniewski, Editor, Artech House, 2008.

2. M. I. Younus, A. Ravindran, A. Savla and M. Ismail, "A reconfigurable Baseband Chain for 3G Wireless Receivers", Chapter 3, Wireless Communication Circuits and Systems, Editor, Y. Sun, IEE Press, 2003.*

Patents

A. Mukherjee, and A. Ravindran, “A Methodology for Scheduling, Partitioning, and Mapping Computational Tasks to Scalable High Performance Hybrid FPGA Networks”, US Patent US 2005/027860

*Published as a graduate student at The Ohio State University

 

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