ECGR 4132/5132/6090-A02--ANALOG INTEGRATED CIRCUIT DESIGN

 

Course Handout

T.A Office Hours: Wednesday and Thursday : 1-2 pm ,CARC 235

Pick up final exam and grades: Friday (05/14) 2 - 4pm

            

Project 

Due April 26th.

Design and layout a single ended two stage Opamp, using the Cadence Virtuoso Custom IC Design Platform, in 0.5μm CMOS, to meet the following specifications:

VDD = 3V, CL = 5pF, UGBW = 15MHz, PM = 70o, DC Gain > 60 dB, SR > 10V/μs  and output swing = 2Vp-p.

(a) For the open loop Opamp, (1) annotate the schematic (DC). (2) Plot the magnitude and phase response (AC).(3)  Plot the output response for a step input of 1Vp-p(transient).

(b) Close the loop to realize a unity gain buffer. (1) Plot the magnitude response (AC) (2) Plot the output response for an input DC sweep of ±1V(DC)  (3)  Plot the output response for a step input of 2Vp-p(transient)c.

(c) Layout the Opamp and ensure DRC compliance.

(d) Run LVS to verify the layout.

Project Viva Schedule

April 26th(Monday)

  1. Jeremy
  2. Srikanth

April 28th (Wednesday)

  1. Lukky et al
  2. Chasity et al
  3. Matt et al
  4. Xing Y
  5. Abdul

                                   

Homework

Homework 2 Problems:-3.1, 3.2, 3.4, 3.14, 3.20(a,c), 3.21(a,b,c,d,e){by inspection}

                     Due date:- 2/11/2004(Wednesday)

Homework 3 Problems:-3.29, 4.5, 4.14, 4.25 Due date: 2/16/2004(Monday)

Homework 4 Problems:-5.5, 5.6 Due date: 3/3/2004(Wednesday). Also set up Cadence in your UNIX account and review  the online tutorials.

Homework 5 Problems:-6.3, 6.4. Use Cadence to simulate the following circuit: Common source amplifier of Figure 3.3 a)  with Vin = 1V, W/L = 10/1.2, RD = 10K and VDD = 3V. Annotate the DC operating points on the schematic and turn in a copy of the annotated schematic. Due date: 3/17/2004(Wednesday).

Homework 6:-a) Repeat Example 9.5 for Power dissipation=5mW and differential output swing= 2V with the rest of the  specifications remaining the same.

b) Workout Example 9.6

c) Cadence:-For the circuit simulated previously, apply a sine input of 1mV amplitude and 1KHz frequency, and plot the output waveform (transient analysis). What signal amplification do you observe?. (One plot)

d) Now add a 1pF load capacitance at the output of the circuit and apply an AC signal of 1V AC magnitude and plot the output magnitude and phase response for a frequency sweep from 10Hz to 1GHz. Repeat the simulation with a 5pF load capacitance. (Four plots) Due date: 3/24/2004(Wednesday)

 

 

 

 

 

 

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