Multicore Architecture and Computing Laboratory (MArCo Lab)
Laboratory: Woodward Hall 254
The research focuses on developing algorithms, architectures, and CAD tools for multi and many core processors targeting high performance and embedded computing applications.
Computing
Theoretical development of parallel algorithms for multicore processors under realistic computational models
Current project: We are developing computational models and an algorithm design methodology for maximizing data sharing on shared cache multicore processors. The algorithms targeted are straight line programs represented as directed acyclic graphs.
Experimental evaluation of parallel algorithms on state-of-the art multicore processors
Current project: We continue to develop and implement parallel algorithms from computational electromagnetics, signal processing, and powerflow computing on shared cache multicores (Intel Clovertown, AMD Barcelona, and Sun Victoria Falls) and message passing multicores (IBM Cell BE)
CAD for application level autotuning
Architecture
Architecture exploration and CAD tools for chip multithreaded architectures targeting embedded applications
CAD framework that integrates the micro architectural design of many core processors with RTOS scheduling policies targeting embedded applications
FPGA emulation of microprocessor architectures and custom co-processors.
Click here for our presentation of our paper titled "A Stream Chip-Multipprocessor for bioinformatics" at the 2007 Workshop on Design Analysis and Simulation of Chip Multiprocessors (asssociated with Micro 40)
Click
here
for a brief demo on emulating chip multiprocessors on FPGAs using Xilinx Platform Studio and Nallatech DIMETalk (
This material is based upon work supported by the National Science Foundation under Grant
No. 0453916. Any opinions,
findings, and conclusions or recommendations expressed in this material
are those of the author(s) and do not necessarily reflect the views of
the National Science Foundation)
.
FacultyGraduate Students
Ph.D.
Reshmi Mitra
Changshu Zhang
Guangyi Cao
M.S.
Aby Kuruvilla
Anup Kulkarni
Yue Liu
Ashish Pandey
Abhishek Moghe
Aboli Bendale
B.S.
Nathan Holder
Alumni
Ravi Kiran Karanam (M.S, Fall 2007, Currently with Qualcomm)
Collaborators
Dr. Cynthia Gibas, Dept. of Bioinformatics and Genomics, UNC Charlotte
Dr. Ryan Adams, Dept. of Electrical and Computer Engineering, UNC Charlotte
Dr. Praveen Ramaprabhu, Dept. of Mechanical Engineering, UNC Charlotte
Mr. David Chassin, Pacific Northwest National Laboratory, Richland, WA
Mr. Daniel Burns, Air Force Research Laboratory, Rome, NY
Dr. David Binkley, Dept. of Electrical and Computer Engineering, UNC Charlotte
Courses
Advanced Computer Architecture (Dr. Joshi, Fall)
Multicore Computing (Dr. Ravindran, Spring)
High Performance Computing with FPGAs (Dr. Mukherjee, Fall and Spring)
Embedded multicore computing (Dr. Mukherjee, Spring)
Publications
9. J. Byun, K. Datta, A. Ravindran, A. Mukherjee, B. Joshi, and D. Chassin, "A parallel powerflow solver based on the Gauss-Seidel method on the IBM Cell BE, Accepted poster presentation Supercomputing 2009.
8. R. Mitra, B. Joshi, R. Adams, A. Ravindran, and A. Mukherjee, "Modeling and performance analysis of parallel magnetostatic wave calculations on multicores", Accepted poster presentation Supercomputing 2009.
7. J. Byun, A. Ravindran, A. Mukherjee, B. Joshi and D. Chassin, “Accelerating the Gauss-Seidel Power Flow Solver on a High Performance Reconfigurable Computer”, IEEE Symposium on Field Programmable Custom Computing Machines, April 2009.
6. A. Ravindran, and D. Burns, “A multi-threaded DNA Tag/Anti-tag Library Generator for Multicore platforms”, IEEE Symposium on Computational Intelligence in Bioinformatics and Computational Biology, March, 2009.
5. J. Byun, K.Datta, A. Ravindran, A. Mukherjee, and B. Joshi, "Performance Analysis of Coarse-Grained Parallel Genetic Algorithms on the Multicore Sun UltraSPARC T1" , IEEE Southeast Conference, March 2009.
4. A. Mukherjee, and A. Ravindran, “A Methodology for
Scheduling, Partitioning, and Mapping Computational Tasks to Scalable High
Performance Hybrid FPGA Networks”, US Patent US 2005/027860
3. R.
Karanam, A. Ravindran, and A. Mukherjee, “A Stream Chip-multiprocessor for
Bioinformatics”, ACM SIGARCH Computer Architecture News, Volume 36, Issue 2, pp.
2 – 9, May 2008.
2. R. Karanam, A. Ravindran, A.
Mukherjee, C. Gibas, and A. Wilkison, “Using FPGA-based Hybrid Computers for
Bioinformatics Applications”, XCell Journal, Issue 58, Third Quarter, 2006
1. K. Regester, J. Byun, A. Mukherjee
and A. Ravindran, “Implementing bioinformatics algorithms on Nallatech-configurable
multi-FPGA systems”, Xcell Journal., pp. 100-103 Second Quarter, 2005.
Computing resources
FPGA boards
1. BenNUEY-PCI-4E-2VP50-5-L (3 cards)
2. BenDATA-DD-2V3000-4 (6 cards)
On-board Xilinx Virtex-II FPGA
1 GByte of DDR SDSRAM in four independent banks DDR
SDRAM interfacing IP Core
DDR Data Rate of 266MHz
Maximum memory bandwidth of 4.2GBytes/second
3. BenBLUE-III 2VP70-5 ( 2 cards)
Two on-board Xilinx Virtex-II Pro FPGAs
72 MBytes of ZBT SRAM in eight independent banks
ZBT SRAM interfacing IP Core
SRAM Data Rate of 166MHz
Maximum memory bandwidth of 6 GBytes/second
4. Xilinix ML501 board with Virtex-5 LX50 FPGA and 256MB DDR2 SODIMM
Computers
Dual Xeon Dell 490 Precision Workstation
Two Opteron Sun Java Workstation W2100z
2 Dell Precision 690 Workstation with two QuadCore Xeon processors
8 Supermicro Bensley servers with qaud core Clovertown 3.0 GHz processors (donation from Intel Corp)
8 node Sony Playstation 3 cluster with Cell Broadband Engine
SunFire T2000 with 8 core UltraSparcT1 processor (donation from Sun Microsystems)
Software
1. FUSE
2. DIMETalk
3. Xilinx ISE tool suite
4. Modelsim tool suite
5. Functionally accurate SPARC architecture model (SAM)
6. SIMICS and GEMS
7. Cell SDK 3.1
7. Solaris Cool Tools
8. Intel VTune Analyzer and Thread Analysis Tools
9. Windows XP and Red Hat Enterprise Linux
Funding
PNNL/Battelle Memorial Institute
Sun Microsystems (Equipment donation)
Intel Corporation (Equipment donation)
Last updated:Aug 26, 2009